The present invention relates, in general, to packaging of electronic parts, and more particularly to a method for automatically generating optimized artwork for custom packages.
Electronic packaging technology plays a critical role in meeting the customer demand for increasingly compact and higher performance of electronic equipment. Tape automated bonding (TAB) is one major technology which helps the electronic packaging industry to meet this challenge. TAB packages allow a fine inner lead bonding or ILB pitch between integrated circuit die pads, yield a superior mechanical strength for bonding, and allows direct outer lead bonding (OLB) to a printed circuit board also at a fine pitch. Fine pitch direct outer lead bonding uses a finer pitch than prior methods. Thus TAB packages help reduce the package body size and produces a more compact printed circuit board as well as better electrical performance.
Typically a TAB package is custom designed manually for each new chip. In an ASIC environment this requires that each new design have a manually designed TAB package for that particular customer order. Even with a skilled designer the design is not electrically optimized. Each of these TAB package routings must be electrically modeled and simulated to check performance at high speed. This is a time consuming process. Standards exist for outer lead bonding but layout of the remainder of the TAB package requires highly skilled judgement. Manual measurement of physical dimensions is required for electrical characterization which makes the process even slower, less accurate, and more error prone. As a result not all leads are characterized for simulation. If the TAB package needs to be redesigned for manufacturability or performance requirements, this can be costly in both money spent and time wasted. Even though a simulation is performed there is no guarantee that the design is electrically the best possible one for this particular chip.
There is a need for a method to produce an error free TAB package design having optimal electrical performance in all cases. This method should eliminate the need for redesign of these packages saving expensive tooling and piece part costs. Complete dimensional information must be extracted to facilitate electrical characterization. Electrical performance must be characterized for every lead of the design. In addition the method should reduce design cycle time and hence reduce the time required to bring a product to market.